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Priority Interrupts | (S/W Polling and Daisy Chaining)

Priority Interrupts | (S/W Polling and Daisy Chaining)

To summarize, when I/O devices are ready for I/O transfer, they generate an interrupt request signal to the computer. The CPU receives this signal, suspends the current instructions it is executing and then moves forward to service that transfer request. But what if multiple devices generate interrupts simultaneously. In that case, we have to have a way to decide which interrupt is to be serviced first. In other words, we have to set a priority among all the devices for systemic interrupt servicing.
The concept of defining the priority among devices so as to know which one is to be serviced first in case of simultaneous requests is called priority interrupt system. This could be done with either software or hardware methods.


  In this method, all interrupts are serviced by branching to the same service program. This program then checks with each device if it is the one generating the interrupt. The order of checking is determined by the priority that has to be set. The device having the highest priority is checked first and then devices are checked in descending order of priority. If the device is checked to be generating the interrupt, another service program is called which works specifically for that particular device.
The structure will look something like this-

  • if (device[0].flag)
    else if (device[1].flag)
        //raise error 
    The major disadvantage of this method is that it is quite slow. To 
    overcome this, we can use hardware solution, one of which involves 
    connecting the devices in series. This is called Daisy-chaining method.


      The daisy-chaining method involves connecting all the devices that can request an interrupt in a serial manner. This configuration is governed by the priority of the devices. The device with the highest priority is placed first followed by the second highest priority device and so on. The given figure depicts this arrangement. 

    There is an interrupt request line which is common to all the devices and goes into the CPU.

    • When no interrupts are pending, the line is in HIGH state. But if any of the devices raises an interrupt, it places the interrupt request line in the LOW state.
    • The CPU acknowledges this interrupt request from the line and then enables the interrupt acknowledge line in response to the request.
    • This signal is received at the PI(Priority in) input of device 1.
    • If the device has not requested the interrupt, it passes this signal to the next device through its PO(priority out) output. (PI = 1 & PO = 1)
    • However, if the device had requested the interrupt, (PI =1 & PO = 0)
    1.  The device consumes the acknowledge signal and block its further use by placing 0 at its PO(priority out) output.
    2. The device then proceeds to place its interrupt vector address(VAD) into the data bus of CPU.
    3. The device puts its interrupt request signal in HIGH state to indicate its interrupt has been taken care of.


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