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Bus and Memory Transfers

 

BUS

If a computer has 16 registers, each holding 32 bits, how many wires are needed to connect every register to every other? (162) For a large number of wide registers, the wires could end up taking most of the space in the circuit.
A BUS is a single shared set of wires connecting all registers.

Memory Transfer

The internal bus connects only registers within the CPU, so how do we get data to and from memory?

The address register (AR) is used to select a memory address, and the data register (DR) is used to send and receive data. Both these registers are connected to the internal bus. DR is a bridge between the internal BUS and the memory data BUS.

Memory can also be connected directly to the internal BUS in theory.

Diagram showing connections to memory unit.

 M[AR] ← DR
 DR ← M[AR] 
 
 Hence, accessing memory outside the CPU requires at least two clock cycles. First we load AR with the desired memory address, and then transfer to or from DR. In most typical computer systems, memory transfers take many clock cycles, known as wait states.

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